PLANNING AND LEADERSHIP FOR A BETTER WORLD
PLANNING AND LEADERSHIP FOR A BETTER WORLD Coming generations of nonvolatile storage will provide such dramatic throughput improvements that they may blur the distinction between mass storage and active memory—spurring deep revisions in the way CPUs, operating systems and applications work. Ultimately, the changes in system architecture and software mind-set occasioned by mass storage advances may be no less profound than those prompted by multicore.
To get a feel for what's around the corner, I strongly recommend reading an article in June's Scientific American by IBM researcher Stuart S.P. Parkin. Parkin is a pioneer in the abstruse field of "spintronics"—manipulation of electron-spin by magnetic fields to inscribe bits.
Parkin's research in the late '80s and early '90s led to the development of the spin-valve magnetoresistive sensor, which in combination with other key technologies enabled a thousandfold increase in HD storage capacity between 1997 and 2002—the most rapid increase in capacity in the almost 50-year history of rigid magnetic storage.
In 2002, Parkin first proposed the idea of using quantum spin to create a sort of nonvolatile, solid-state virtual hard drive. Instead of magnetically inscribed bits sequenced statically in tracks on a spinning platter, this new device would store strings of spin-inscribed bits on static nanowires, then use current and magnetism to move the sequence of bits along the wires, past a read/write head. The technique would enable access speeds in the several nanosecond range—millions of times faster than an HDD and comparable to volatile memory.
Not only this, but the architecture—dubbed "Racetrack Memory"—would require only one or two transistors per nanowire, as opposed to volatile memory's typical one transistor per bit. Parkin's group is presently experimenting with extending the architecture into three dimensions, using vertical nanowire loops instead of nanowires inscribed on flat substrates. In principle, this could increase manyfold the potential density of this type of storage, making it competitive in capacity with today's HDs.
Racetrack Memory technology is still several years away from market and, as it evolves toward productization, will compete with several other technologies. Whichever approach "wins," the takeaway is that we're fast approaching an inflection point where HD technology begins looking like tape (i.e., too slow to fool around with for computation), and local mass storage and RAM start to blur together functionally.
As this revolution takes hold, a lot of the architectural assumptions implicit in the design of modern applications, operating systems, processors, and disk and memory controllers will be rethought—concepts like disk-based, paged virtual memory may vanish; and caching may move to a new position in the food chain. Product categories such as in-memory databases, etc., may lose distinction. Databases themselves will probably undergo profound changes, as generations of IP devoted to maximally efficient disk access, predictive caching and other HD-bound performance-enhancement techniques are suddenly brought to the brink of irrelevance. Standard programming approaches will change as well: Things presently computed on-the-fly because CPU cycles have historically been so much less costly than disk accesses may shift to being precomputed and stored because "disk read/writes" now occasion the same performance hit as variable value assignment and retrieval.
It's going to be interesting.
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